Computer Organization | Module 5: Part 1| Basic Concepts

Dear students, today I am going to discuss about memory structures. Here we will see the basic connection between processor and memory. Then we will see how memory is internally organized in a memory

chip. Before entering into this topic, let me ask one simple question. Why do we need memory? Well, we use our memory to remember data so that we can use it later.

Similarly, computers use memory for remembering data to use it later. The memory of computer is broadly classified into two categories, internal and external. Internal

memory is used by CPU to perform tasks and external memory is used to store bulk information which includes large software and files. We

know a memory is a collection of storage cells together with associated circuits needed to transfer information in and out of storage. Programs and data they operate on

are held in the main memory of the computer during execution. The modern computers are byte address.

The maximum size of the memory that can be used in any computer is determined by its address scheme. For example, a 16 bit computer that generates 16 bit address is capable of addressing up

to 2 raise to 16 memory location that is around 2, that is around 64,000 memory location. So this computer can have

memory size of a 32 bit address can address up to 2 raised to 32 memory locations. In general, k bit address can identify 2 raise to k memory locations.

Modern implementation of computers are complex and difficult to understand. To simplify our introduction to memory structures, let's look into the traditional architecture.

This diagram shows the connection of the memory to the processor. The data transfer between the processor and memory take place through two processor registers usually

called mar and MDR memory data register. If MAR is k bit long, then the memory may contain up to 2 raised to k addressable

location. And if MDR is N bit long, n bit of data are transferred between the memory and the processor. If MAR is k bit long, the

address bus may contain k bits and if MDR is n bit Y, then the data bus may contain n bit of information at a time. The bus also includes control lines

such as read write and memory function completed for coordinating data transfer. For reading read write, control line is set to 1 and for writing ReadWrite, Control Line is set to 0.

Let's see how read and write operation happens. To read a word, the processor loads the address of the required memory location into MAR and setting the read Write line to 1. Then

memory places the requested data on the data bus and confirms this action by asserting MFC signal. Upon receipt of MFC signal, the processor loads the data on the data line to MDR register. If

the operation is memory right, then the CPU places the data into MDR and the address to mar and it set the read write control line to zero. Then

it loads the content of MDR to the specified memory location. Once the content of MDR are stored in the specified memory location, then the memories are good. We'll indicate the end of the operation by

setting MFC signal to 1. Memory speed is an important factor. Memory speed can be measured by calculating memory access time and

memory cycle time. Memory access time is the time that elapses between the initiation of an operation and the completion of an operation. For example, it is the time between read and

MFC signal that is to read a word. The read control signal is set to one. Then upon the receipt of the requested word, M of C, signal is set to one.

So we can say that the time required to complete a read operation is the time between its read and MFC signal. Another measure is memory cycle time. This is the minimum time

delay between the initiation of two independent memory operations. For example two successive memory read operations. Memory cycle time is slightly larger than memory access time. One

way to reduce memory access time is to use cache memory. Cache memory is the storage device placed in between CPU and main memory. These are semiconductor memories. These are basically

fast memory device, faster than main memory. We cannot have big volume of cache memory due to its higher cost and some constraints of cpu. Normally

it halts currently active segments of a program and the data and these segments are bought from main memory and it is placed in a memory. Nowadays we get CPU with internal cache.

Next is the concept of virtual memory. Here its name says itself that it is virtual. Do you ever thought how to run applications that are even bigger than the

size of the main memory? Where the concept of virtual memory print. In this case, the whole application is never loaded into the main memory. Only

the part of the application that is currently needed by the CPU is loaded into the main memory and the remaining part is stored in the secondary storage device. That is, with this technique, only

the active portions of a program are stored in the main memory and the remainder is stored in much larger secondary storage device sections of the program that are transferred back and forth between the main

memory and the secondary storage device. As a result, the application program sees a memory that is much larger than the computer's physical main memory. That

is actually there is a small physical main memory. But the application programs get an illusion that there is a very huge main memory.